EDN

Get a hands-on tutorial in FPGA design at ESC Silicon Valley

I just heard from my chum Jason Pecor at Alorium Technology. Jason and his colleague, Bryan Craker, will be giving a 2-hour tutorial at ESC Silicon Valley 2016. Titled A Novel Hands-On Approach to ...
Design-Reuse

Fpga verilog tutorial IP Listing

The T-COR-30 FPGA IP core implements the algorithm of automatic tracking of objects in video and calculation of their pa-rameters for solving guidance and target designation tasks. The IP core ... The ...
Hackaday

FPGA Clocks For Software Developers (or Anyone)

It used to be that designing hardware required schematics and designing software required code. Sure, a lot of people could jump back and forth, but it was clearly a different discipline. Today, a lot ...
Linux Journal

Xilinx FPGA Design Tools for Linux

A field programmable gate array (FPGA) is a user-programmable piece of silicon constructed in very large-scale integration (VLSI) technology. The VLSI transistor-level detail is absolutely predefined ...
Geeky Gadgets

STEPFPGA FPGA development board with cloud-based IDE

The STEPFPGA MXO2Core is a miniature FPGA development core board designed based on Lattice MXO2-4000 FPGA chip. “This versatile FPGA chip combines some great advantages of FPGAs and CPLDs, the ...
TechRepublic

Verilog Implementation of 32 Point FFT Using Radix-2 Algorithm on FPGA Technology

Here the transformation related to the fast Fourier strategy mainly used in the field oriented well effective operations of the strategy elated to the scenario of the design oriented fashion in its ...
Design-Reuse

Altera verilog tutorial IP Listing

The BAY9 Virtual RF (VRF) is an IP core written in Verilog, that allows to emulate most system aspects of a typical RF transmission. When connected to a physical layer (PHY) core, the VRF IP ... The T ...