Recently, many methodologies have been introduced for reducing dynamic power for systems-on-chip (SoCs). These methodologies, however, impose restrictive physical constraints which have schedule ...

The 74AUP1G373 is a single D-type transparent latch that provides a 3-state output. It is designed specifically for partial power-down applications. The Q output follows the data (D) input while the ...

The 74AHC373 and 74AHCT373 are Si-gate CMOS devices that are composed of eight D-type transparent latches with 3-state true outputs intended for bus oriented applications. These devices are compatible ...

2.5D/3D ICs have evolved into an innovative solution for many design and integration situations, but they present unique verification obstacles that challenge electronic design automation (EDA) tools ...