Mountain View, Calif.-NetChip Technology Inc.'s newest controller chip (see diagram below) has been designed as a direct bridge between a PCI-based ASIC or CPU and Hi-Speed USB 2.0. The device can be ...

Elstree, UK, 03 December 2001 -- New PCI host bridge and memory controller interface intellectual property (IP) cores are now available for the ARCtangent[tm]-A4 processor, a leading user-customizable ...

Continuing our coverage of working around the 8 GB installation limit, some MacFixIt readers have suggested using an internal PCI IDE/ATA controller to connect their built-in drive, bypassing the ...

Intel's architecture for the 8xx family of chipsets, starting with the 820. It uses a memory controller hub (MCH) that is connected to an I/O controller hub (ICH) via a 266 MB/sec bus. The MCH chip ...

As we edge closer to the launch of AMD's Ryzen 3000 series we are learning more details about some of the new features it will offer. The latest of which is that the Zen 2 architecture will be able to ...